Recent popularity of portable, battery-powered electronic appliances has prompted intense pressure to maximize battery life by cutting power consumption in the appliances. The system designer attempting to respond to this pressure will scrutinize every part of a system to attempt to identify opportunities to save power.
Some integrated circuits, including microprocessors and microcontrollers, depend upon an oscillator to provide a clock for clocking various processes. The oscillator typically draws a non-negligible portion of the energy budget, and is thus a natural target of the system designer in efforts to conserve power. Thoughtful analysis of the functions provided by the integrated circuit in relation to the system in which it functions will often identify some regimes of operation in which the integrated circuit could slow down or halt, thus conserving power.
If the integrated circuit uses an internal oscillator with an external crystal or resonator, then the oscillator takes some time to stabilize each time it is started, and for short tasks the stabilization time may account for a large portion of the xe2x80x9conxe2x80x9d time for the oscillator. This is wasteful of power.
If the integrated circuit uses an external oscillator of conventional design, then it is generally not within the ability of the designer of the external oscillator to power down the oscillator at the right times and power it up again at the right times, for the simple reason that the events that would desirably trigger such powering-up and powering-down are internal to the integrated circuit and thus are not easily externally discernable.
For system designers concerned with reducing power consumption to the greatest extent possible, it would be extremely desirable to have an external clock apparatus which could discern the internal use state of an integrated circuit so as to power-up and power-down an oscillator as needed, based on the internal state. Such apparatus would desirably require no pins on the integrated circuit other than pins already provided for clock purposes, and would desirably itself take up very little space.
The problem of undesired power consumption in an oscillator during xe2x80x9cstopxe2x80x9d periods of a device is addressed by providing the oscillator in apparatus external to the device, the apparatus including a current sensor sensing current in a line between the apparatus and the device, the line communicating an oscillator xe2x80x9cclockxe2x80x9d signal. If the device enters a xe2x80x9cstopxe2x80x9d state the current flow during certain half-cycles of the oscillation is relatively low compared to the current flow in the xe2x80x9cno-stopxe2x80x9d state. In response to the relatively low current, the apparatus halts oscillation. Later, when the device exits the xe2x80x9cstopxe2x80x9d state, current flow increases in the line, and the apparatus resumes oscillation, thereby resuming the communication of the clock signal to the device. Alternatively the apparatus monitors two oscillator lines by means of an XOR gate, powering down the oscillator when the XOR output goes low and restoring the oscillator when the XOR output goes high.